1. Field of the Invention
This invention relates generally to semiconductor chips mounted to carrier substrates. More particularly, this invention pertains to apparatus and methods for providing a down-bond for flip-chip technology or, stated another way, for providing an electrical connection between the back side of a semiconductor die which has been face-down electrically connected to traces on a carrier substrate.
2. State of the Art
There are a number of reasons for providing a ground connection between the back side of a semiconductor die or chip and circuitry on a carrier substrate to which the active side of the die is electrically connected. Such a connection provides a threshold potential very useful for characterizing the die, and enables access from the substrate to the die for controlling the die characteristics or for trouble-shooting of the die.
A relatively recent innovation in semiconductor chip technology is the flip-chip, a packaging configuration in which contacts on the active surface of an integrated circuit die are bonded directly to conductive traces of an insulated carrier substrate by, e.g., solder bumps, conductive epoxy or conductor filled epoxy. The advantages of the flip-chip connection when properly executed may include an increase in production volume, device reliability and improved device performance at reduced cost in comparison to lead-frame mounted, transfer-molded dice or even bare die bare-bonded to a carrier substrate and having wire bonds extending to the substrate traces. Automated production is enhanced in comparison to wire-bonded dice because all active connections between each die and carrier substrate may be made simultaneously. This advantage is particularly significant in multi-chip modules (MCMs) employing a large number of dice on a single carrier substrate, examples of such devices including without limitation single in-line memory modules (SIMMs) and dual in-line memory modules (DIMMs), as well as multi-chip printed circuit boards (PCBs) carrying processor, memory, logic and other dice in combination.
However, providing a connection between the ground plane of the flip-chip and the substrate ground is made more difficult, because the flip-chip ground plane faces away from the substrate. Thus, conventional placement of a down-bond requires an additional time-consuming operation.
Because of the miniature scale of such chips and the relatively fragile circuit connections thereon, extreme care must be taken to avoid breakage or non-connection of required electrical circuits, whether formed of wire, solder bumps, conductive epoxy, TAB leads, laser pantography formed wires, or other means. Physical handling of such small chips and the component parts thereof presents significant problems. For forming very large scale integrated (VLSI) circuits incorporating a large number of circuits in a chip requiring many connections, alignment of the chip with a carrier substrate may be extremely difficult, particularly with the minute conductive flip-chip bumps and fine pitch (spacing) therebetween employed with increasing frequency. In addition, the back side of each chip must be separately connected to the substrate to establish a ground or reference potential.
In U.S. Pat. No. 5,311,059 of Banerji et al., a backplane grounded flip-chip integrated circuit die is disclosed in which a continuous film or coating of an electrically conductive material is applied to the back side of the flip-chip die and over concave peripheral fillets of an insulative underfill material disposed between the active surface of the chips and the carrier substrate, the surface of the substrate, and the ground connection (terminal) of the substrate. The technique does not address the problems encountered in handling chips without damage, or the difficulties encountered in precisely aligning conductively-bumped chips for face-down joining to the substrate conductors. Furthermore, Banerji does not provide any technique for simultaneously handling, aligning and bonding multiple flip-chip dice or of making a single, common ground or reference connection to the substrate for more than one die.